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Cadence Launches Nvidia-Backed AI Suite for In-House Chip Design

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Oct 26, 20262 min read
Cadence Launches Nvidia-Backed AI Suite for In-House Chip Design
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Background

Cadence Design Systems (NASDAQ: CDNS) on Monday launched a portfolio of artificial intelligence models designed to accelerate computer chip design, deepening its collaboration with Nvidia (NASDAQ: NVDA). The new suite, named Maestro, notably allows customers to run the models within their own data centers, offering a different approach to AI integration than its chief competitor, Synopsys.

The Maestro Suite

The Maestro AI models were developed in part using Nvidia's open-weight Nemotron model and are secured with Nvidia's OpenShell technology, according to the companies. Cadence is positioning the suite as a flexible solution that gives chipmakers control over their proprietary data and design processes.

Key features of the new offering include:

  • Deployment Flexibility: Customers can run the AI models on-premises behind their own firewalls, on the Cadence cloud, or on any public cloud.
  • Customization: The models can be fine-tuned using a company's own chip design data.
  • Performance Claims: Cadence reported that early results show up to 30% higher quality and up to five times better cost-efficiency compared to using general-purpose AI models for the same tasks.

The first Maestro models are slated to reach select early-access customers in the fourth quarter, Cadence said.

A Strategic Divergence

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Cadence's strategy presents a clear contrast to that of its largest rival in the electronic design automation (EDA) space, Synopsys (NASDAQ: SNPS). On September 30, Synopsys announced a partnership with OpenAI to develop an AI model, GPT-Synopsys, which will run exclusively on OpenAI's hosted infrastructure.

The ability to run Maestro in-house addresses potential concerns among semiconductor firms about intellectual property security and data privacy when using cloud-based AI services. This move caters to customers who prefer to maintain full control over their most sensitive design data.

Market Context and Outlook

The announcement highlights the race among EDA software providers to embed AI "agents" into the chip design workflow, a complex process that involves arranging billions of transistors. The goal is to leverage AI to assist human engineers, speeding up development cycles and improving chip performance.

Paul Cunningham, a senior vice president at Cadence, described Maestro as "model-agnostic," indicating the platform is not limited to Nvidia's technology. He stated that working with commercial AI labs is "part of the Maestro vision" and that both open- and closed-weight model approaches are being "pursued equally," suggesting Cadence may forge other AI partnerships in the future.

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